COURSE For Engineering Students / COLLEGE Students


There are different programs available in Industrial Training in VLSI Design. Students can choose the programs they are inclined to pursue.

Title Module
Introduction to VLSI
  • VLSI Design Flow
  • RTL Design Methodologies
Fabrication of MOSFETs
  • Introduction
  • Fabrication Process Flow
  • Layout Design Rules
MOS Transistor
  • The MOS Structure
  • Structure and operation of MOSFET
  • MOSFET current and voltage characteristics
  • MOSFET scaling and small geometry effects
MOS Inverters : Statics characteristics
  • Introduction
  • Resistive Load Inverter
  • Inverters with n type MOSFET load
  • CMOS Inverter
MOS Inverters: Switching Characteristics and interconnect Effect
  • Introduction
  • Delay Time Definitions
  • Calculation of Delay Times
  • Inverter Design with Delay constraints
  • Estimation of Interconnect Parasites
  • Calculation of Interconnect Delay
  • Switching Power Dissipation of CMOS inverters
Combinational MOS Logic Circuits
  • Introduction
  • MOS Logic Circuits with Development nMOS Loads
  • CMOS Logic Circuits
  • Complex Logic Circuits
  • CMOS Transmission Gate (Pass Gate)
  • Introduction
  • Behavior of Bistable Element
  • Voltage Bootstrapping
  • Synchronous Dynamic Circuit Techniques
  • High Performance Dynamic CMOS Circuits
Semiconductor memories
  • Introduction
  • ROM circuits
  • SRAM circuits
  • DRAM circuits
Low power CMOS logic circuits
  • Introduction
  • Overview of power consumption
  • Low power design through voltage scaling
  • Estimation and optimization of switching activity Capacitance
  • Adiabatic Logic Circuits


  • This course will provide you a design level understanding of VLSI and VLSI CAD Tools.
  • It provides opportunities to utilize the available resources to implement live projects.
  • Enhances the Skill-Set in your resume for better placement prospects
  • Build your confidence through hands on exposure to various tools & technologies.
  • It helps in Keep pace with Industry Developments.